Wi-Fi RFID SoC suits real-time location system market.
April 26, 2006 - Operating on 2.4 GHz band, G2C501 active RFID System-on-a-Chip (SoC) uses Wi-Fi(TM) 802.11 compliant PHY/MAC standard to facilitate installation of asset tracking systems. Integrated circuit architecture enables active asset tracking tags to last 5 years at 40 sec report rate with 2 AA batteries. Along with integrated support for multiple location technologies and environmental sensing, SoC offers integrated EPC support to operate as passive RFID tag.
2) http://findarticles.com/p/articles/mi_hb5251/is_200103/ai_n20105744
Industry booms spawn successful companies, but can one company spawn an industry boom? Rick Snyder thinks so, and he's betting more than $100 million on it. Snyder formed Ardesta L.L.C., which has $100 million to invest in companies that develop and use microsystems. Microsystems are essentially tiny computers that have uses in many industries, including wireless, optical and bio- technology.
But Ardesta officials say the firm isn't just another industry-focused venture-capital firm. It dubs itself an ``industry accelerator,'' because in addition to funding early-stage companies, ..
3) http://findarticles.com/p/articles/mi_m0EKF/is_n2226_v44/ai_20894029
AMI Targets Gate Array ASIC Conversion Market - American Microsystems' Cutthroat gate array ASICs - Product Announcement
Pocatello, Idaho -- With pure gate arrays continuing to shrink in terms of share of the logic market, some companies are holding to their belief this market can still produce some revenue opportunity. American Microsystems Inc. (AMI) is certainly one of those companies; it is rolling out a series of gate array ASICs, dubbed Cutthroat, targeted at the conversion of field programmable gate array (FPGA) to ASIC products.
The gate array line delivers PCI-ready gate-array ASICs with input/output performance of 66MHz and a clock-to-out performance of 5 nanoseconds. AMI is primarily targeting the communications and telecommunications companies that have had trouble developing FPGAs with 66MHz clock speeds.
"The problem with FPGAs is their architectures are relatively slow. It's difficult, at present, to get the FPGA core logic to perform at PCI system clock speeds," said Bob Kirk, AMI's manager of Translation ASICs Methodology Group. "Although the FPGAs have been able to offer TCP (clock-to-out) speeds as low as five nanoseconds, they have difficulty getting the core logic to perform at 66 megahertz."
The gate arrays are based on AMI's 0.5-micron 3.3-volt digital CMOS process. The Cutthroat devices are both 5V and 3.3V tolerant and the gate arrays are available now with prices dependent upon the volume and feature set. AMI's non-recurring engineering (NRE) fees range from $10,000 to $50,000 depending on the size and complexity as well. AMI said it can convert an FPGA design to an ASIC in less than four weeks.
The Cutthroat family also includes enhancements to the memory implementation on the chip. AMI claims to be able to implement RAM on-chip without using a standard cell or embedded memory. AMI said it cuts gate array RAM sizes in half and has an architecture that is similar to Altera's extended array block (EAB) RAM. This also allows for improvements to the routing and placement of the memory on-chip as well.
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